UM08001 J

2024-03-12 07:35| 来源: 网络整理| 查看: 265

This is the user documentation for owners of SEGGER debug probes (J-Link and J-Trace). This manual documents the J-Link software provided by the J-Link Software and Documentation Pack and advanced features of J-Link and J-Trace, like Real Time Transfer (RTT), J-Link script files or Trace.

Contents 1 J-Link Software and Documentation Pack 1.1 Software overview 1.2 Troubleshooting 1.2.1 Connection issues 1.2.2 Reset unlock message box 1.2.3 Windows Defender under Windows 10 1.2.4 Missing GUI dialogs 2 Working with J-Link and J-Trace 2.1 Probe network setup 2.2 Supported IDEs 2.3 Connecting to target system 2.3.1 Power-on sequence 2.4 Verifying target device connection 2.4.1 Problems 2.5 Indicators 2.5.1 Main indicator 2.5.1.1 Bi-color indicator (J-Link V8 and later) 2.5.1.2 Single color indicator (J-Link V7 and earlier) 2.5.2 Input and Output indicator 2.5.2.1 Bi-color input indicator 2.5.2.2 Bi-color output indicator 2.5.3 J-Trace Pro indicator 2.6 JTAG interface 2.6.1 Multiple devices in the scan chain 2.6.1.1 Specifications 2.6.1.2 Configuration 2.6.2 Determining values for scan chain configuration 2.6.2.1 Sample configurations 2.6.3 JTAG Speed 2.6.3.1 Fixed JTAG speed 2.6.3.2 Automatic JTAG speed 2.6.3.3 Adaptive clocking 2.7 SWD interface 2.7.1 SWD speed 2.7.2 SWO 2.7.2.1 Max. SWO speeds 2.7.2.2 Configuring SWO speeds 2.8 Multi-core debugging 2.8.1 How multi-core debugging works 2.8.2 Using multi-core debugging in detail 2.8.3 Things you should be aware of 2.8.3.1 JTAG speed 2.8.3.2 Resetting the target 2.9 Connecting multiple J-Links / J-Traces to your PC 2.9.1 Reconfiguration of older J-Link models to the new enumeration method 2.9.2 Re-configuration to the old USB 0-3 enumeration method 2.10 J-Link web control panel 2.11 Reset strategies 2.12 Using DCC for memory access 2.12.1 Requirements 2.12.2 Target DCC handler 2.12.3 Target DCC abort handler 2.13 J-Link settings file 2.14 J-Link script files 2.15 J-Link Command Strings 2.16 Switching off CPU clock during debug 2.16.1 Non-synthesizable cores (ARM7TDMI, ARM9TDMI, ARM920, etc.) 2.16.2 Synthesizable cores (ARM7TDMI-S, ARM9E-S, etc.) 2.17 Cache handling 2.17.1 Cache coherency 2.17.2 Cache clean area 2.17.3 Cache handling of ARM7 cores 2.17.4 Cache handling of ARM9 cores 2.17.4.1 When entering debug state 2.17.4.2 When leaving debug state 2.18 VCOM Virtual COM Port (VCOM) 2.18.1 Configuring Virtual COM Port 2.18.1.1 Via J-Link Configurator 2.18.1.2 Via J-Link Commander 3 Flash download 3.1 Benefits of the J-Link flash download feature 3.2 Licensing 3.3 Supported devices 3.4 Setup for various debuggers (internal flash) 3.5 Setup for various debuggers (CFI flash) 3.6 Setup for various debuggers (SPIFI flash) 3.7 QSPI flash support 3.7.1 Setup the DLL for QSPI flash download 3.8 Using the DLL flash loaders in custom applications 3.9 Debugging applications that change flash contents at runtime 4 Flash breakpoints 4.1 Introduction 4.1.1 How do breakpoints work? 4.1.2 What is special about software breakpoints in flash? 4.1.3 What performance can I expect? 4.1.4 How is this performance achieved? 4.2 Licensing 4.2.1 Free for evaluation and non-commercial use 4.3 Supported devices 4.4 Setup with various IDES 4.4.1 Compatibility with various debuggers 4.5 Flash Breakpoints in QSPI flash 4.5.1 QSPI flashbreakpoint setup 5 Monitor Mode Debugging 5.1 Enabling monitor debugging mode 5.2 Availability and limitations of monitor mode 5.2.1 Cotex-M3 and Cortex-M4 5.2.1.1 Considerations & Limitations 5.3 Monitor code 5.4 Debugging interrupts 5.5 Servicing interrupts in debug mode 5.6 Forwarding Monitor Interrupts 5.7 Target application performs reset (Cortex-M) 6 Low Power Debugging 6.1 Introduction 6.2 Activating low power mode handling for J-Link 6.3 Restrictions 7 RDI 8 ARM SWD specifics 8.1 SWD multi-drop 8.1.1 How it works 8.1.2 Setting up SWD multi-drop in the J-Link software 8.1.3 J-Link SWD multi-drop support 9 RTT 10 Trace 10.1 Introduction - Trace 10.1.1 What is backtrace? 10.1.2 Most common trace types 10.1.3 What is code coverage? 10.1.4 What is code profiling? 10.2 Tracing via trace pins 10.2.1 Cortex-M specifics 10.2.2 Trace signal timing 10.2.3 Adjusting trace signal timing on J-Trace 10.3 Tracing with on-chip trace buffer 10.3.1 CPUs that provide tracing via pins and on-chip buffer 10.4 Target devices with trace support 10.4.1 Additional information about device support 10.5 Streaming trace 10.5.1 Download and execution address 11 Target interfaces and adapters 11.1 Interfaces 11.2 Target connectors of different models 11.3 Adapters 11.4 Pull-up/pull-down resistors 11.5 Target power supply 11.6 Reference voltage (VTref) 12 Background information 12.1 Flash programming 12.1.1 How does flash programming via J-Link / J-Trace work? 12.1.2 Data download to RAM 12.1.3 Data download via DCC 12.1.4 Available options for flash programming 12.1.4.1 J-Flash - Complete flash programming solution 12.1.4.2 RDI flash loader: Allows flash download from any RDI-compliant tool chain 12.1.4.3 Flash loader of compiler / debugger 12.1.4.4 Write your own flash loader 12.2 J-Link / J-Trace firmware 12.2.1 Firmware update 12.2.2 Downgrading / Replacing the firmware 13 Designing the target board for trace 13.1 Overview of high-speed board design 13.1.1 Avoiding stubs 13.1.2 Minimizing Signal Skew (Balancing PCB Track Lengths) 13.1.3 Minimizing Crosstalk 13.1.4 Using impedance matching and termination 13.1.5 Terminating the trace signal 13.1.5.1 Matched impedance 13.1.5.2 Series (source) termination 13.1.5.3 DC parallel termination 13.1.6 Rules for series terminators 13.2 Signal requirements 14 Semihosting 15 Environmental Conditions & Safety 15.1 Affected models 16 Contacting support J-Link Software and Documentation Pack

The J-Link Software and Documentation Pack, available for download on the SEGGER homepage, includes applications to be used with J-Link and J-Trace and in some cases Flasher. It also comes with USB-drivers for J-Link, J-Trace and Flasher.

Software overview Software Description J-Link Commander Command-line tool with basic functionality for target analysis. J-Link GDB Server The J-Link GDB Server is a server connecting to the GNU Debugger (GDB) via TCP/IP. It is required for toolchains using the GDB protocol to connect to J-Link. J-Link GDB Server CL Command line version of the J-Link GDB Server. Same functionality as the GUI version. J-Link Remote Server Utility which provides the possibility to use J-Link / J-Trace remotely via TCP/IP. J-Mem Target memory viewer. Shows the memory content of a running target and allows editing as well. J-Flash1 Stand-alone flash programming application. J-Flash SPI1 Stand-alone (Q)SPI flash programming application. J-Flash Lite Stand-alone flash programming application with reduced feature set of J-Flash. J-Link RTT Viewer Displays the terminal output of the target using RTT. Can be used in parallel with a debugger or stand-alone. J-Link SWO Viewer Displays the terminal output of the target using the SWO pin. Can be used in parallel with a debugger or stand-alone. J-Link SWO Analyzer Command line tool that analyzes SWO RAW output and stores it into a file. JTAGLoad Command line tool that opens an svf file and sends the data in it via J-Link / J-Trace to the target. J-Link Configurator GUI-based configuration tool for J-Link. Allows configuration of USB identification as well as TCP/IP identification of J-Link debug probes. RDI support (JLinkRDI.dll)1 Provides Remote Debug Interface (RDI) support. This allows the user to use J-Link with any RDI-compliant debugger. J-Link STR91x Commander Command line tool for handling specific STR91x processors. J-Link STM32 Unlock Command line tool for handling specific STM32 processors. J-Run Command line utility for automated tests. J-Link License Manager GUI-based J-Link license management tool J-Scope Data visualization and analysis tool. J-Link DLL Updater (Windows only) Application to update J-Link DLL for common IDEs with J-Link integration. Device Provisioner Command line tool that supports provisioning of devices (debug authentication, lifecycle management, ...)

1: Full-featured J-Link (PLUS, PRO, ULTRA+) or an additional license for J-Link Base model required.

Troubleshooting

This section covers generic troubleshooting advice when encountering issues while using J-Link/J-Trace.

Connection issues

Most connection issues between J-Link and Target MCU or host PC and J-Link are caused by problematic or faulty setups. To rule out setup related issues, please refer to the following articles:

Connection issues between Host PC and J-Link Connection issues between J-Link and target MCU Reset unlock message box Device unlock messagebox for STM32 devices

The J-Link DLL / J-Flash checks the write protection on connect (e.g. when triggering read-back) and offers to perform a unlock (mass erase) if active write-protection has been detected. In this case, a message box is shown which allows the user to confirm or decline the unlock. This message box can be disabled by checking the Remember selected action check box. The selection will be saved in a registry key.

The setting can be reset using the J-Link Configurator. See:

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